1. Technical Field
The present invention relates to a display panel that can improve operational reliability of a gate driver, and a borderless type display including the same.
2. Description of the Related Art
Among various flat panel displays, liquid crystal displays are widely applied to laptops, televisions, tablets, monitors, smartphones, portable displays, and portable information devices due to excellent characteristics thereof, such as thin thickness, light weight, and low power consumption.
A liquid crystal display includes a liquid crystal panel, a backlight unit providing light to the liquid crystal panel, and a plurality of driver circuits driving the liquid crystal panel and the backlight unit. The plurality of driver circuits includes a gate driver circuit applying a gate signal to each gate line of the liquid crystal panel and a data driver circuit applying a data signal to each data line of the liquid crystal panel. The gate driver circuit is disposed in a gate in panel (GIP) manner in the liquid crystal panel and includes a plurality of stages composed of a plurality of thin film transistors (TFTs).
Referring to FIG. 1, each of the stages of the gate driver circuit according to a related art includes a Q node controlling a pull-up TFT Tup, a QB node controlling pull-down TFTs Tpd1, Tpd2, and a plurality of switch TFTs (not shown) charging the Q node while discharging the QB node or discharging the Q node while charging the QB node in response to external signals.
As shown in FIG. 1a, each of the stages of the gate driver circuit charges the Q node in response to a start signal and bootstraps potential of the Q node in response to a clock signal CLK to turn on the pull-up TFT Tup, thereby outputting a gate signal Vg. Then, each of the stages lowers potential of the Q node from a high level to a low level in response to a reset signal and maintains the potential at the low level for a predetermined period of time.
Here, the QB node of each of the stages is charged when the Q node is discharged and is discharged when the Q node is charged. In other words, at each stage, when the Q node has a high potential, the QB node has a low potential, and, when the Q node has a low potential, the QB node has a high potential.
As a result, at each stage, positive bias temperature stress PBTS is accumulated in TFTs switched depending on the potential of the QB node, for example, in the pull-down TFTs Tpd1, Tpd2 and some switches TFTs. The accumulated PBTS increases with increasing driving time of the liquid crystal display. As a result, the stressed TFTs are deteriorated, thereby causing the threshold voltage of the TFTs to be shifted in the positive (+) direction.
In order to address this problem, as shown in FIG. 1a, the general gate driver circuit alternately drives two pull-down TFTs Tpd1, Tpd2 respectively connected to two QB nodes QB1, QB2 of each of the stages to reduce deterioration of the TFTs.
Recently, in order to improve response of a liquid crystal display, oxide TFTs having higher electron mobility than amorphous silicon (a-Si:H) TFTs are used in a liquid crystal panel and a gate driver circuit
However, the amount of negative shift of threshold voltage of an oxide TFT is much smaller than that of an amorphous silicon TFT. Thus, even when each of the stages of the gate driver circuit is composed of oxide TFTs, as shown in FIG. 1a, deterioration of the TFTs cannot be reduced, thereby causing the threshold voltage of the TFTs to be shifted in the positive (+) direction.
As a result, the magnitude of output current of each of the stages of the gate driver circuit is reduced due to accumulated PBTS, causing deterioration in reliability of the gate driver circuit.